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Kgluong

7 months ago

8 core looks like it will be the standard. I won't be surprised if the zen 2 can be oc to 5.5ghz. What is more interesting is the release date. It might be six months from now but 1 or 2 months.

https://m.youtube.com/watch?v=G7TI-woWGfU&time_continue=217&ebc=ANyPxKpX0h_7dQ5SLw5AXKCCJE4NGEo52iW-7JsA9ZX1EZDVi8zJ6nBujM1hbNdX7N2cWXf7xjtV3FsjhWhBgXd_Bu15H0sfww

Comments

  • 7 months ago
  • 5 points

Take it with a massive grain of salt.

  1. It is WCCFTech.

  2. Early retailer listings are as often placeholders as correct.

As for the release date AMD has already launched the EPYC 2 that were moved to the frontline products and an earlier launch has been known for awhile.

And they are using 8xcore chiplets on a 7nm early process from TSMC.

What we don't know is how well clock scaling will be now that the cores are no longer connected to the memory controller, if they are truly moving to PCI-e 4.0 for consumer, and compatibility with existing motherboards since the old "AM4 till 2020" was based on them moving to PCI-e 4.0 at that point not now.

  • 7 months ago
  • 1 point

I don't why people think this is a fake when the chip is 7nm which is inline with the preformance listed. Whatever the case maybe we will know the truth few days from now with the official amd announcement. I would expect all manufacturere and most major retailers already have the official stats by now so they can get ready to roll zen 2 out.

  • 7 months ago
  • 4 points

The gains from 7nm are not across the board as many misinterpretations think.

You can have the size reduction.

You can have the clock speed gains.

You can have the power efficiency.

You don't get all three without giving up most of the gains from all of them.

And in this case we already know which of the three AMD has focused the design around.

I would expect all manufacturere and most major retailers already have the official stats by now so they can get ready to roll zen 2 out.

And any who do have those specifications are under NDA and cannot disclose anything without losing their place in the shipping queue.

That's why most use placeholder specifications in their ordering system in case someone hits the wrong button and something goes live.

[comment deleted]
  • 7 months ago
  • 3 points

It officially means "the smallest feature on the chip" or possibly just how wide a line you can draw within the error of the photolithography. Things get pretty weird at that level.

Traditionally (1980-2000/2010ish) this was the width of the gate. But at some point gates started leaking nanoamps and then microamps and steps had to be taken to prevent that, including wider gates. Now the number just means a rough scaling that eventually traces its way back to numbers well defined by gate width, but the exact differences can be pure marketing (don't assume that TSMC's "7nm" is better than Intel's "10nm" (at least the one they were originally trying to achieve) just because the number is lower.

PS: Zen1 was on GF's 16nm and Zen+ GF's 14nm while Zen2 will be TSMC's 7nm. Scaling will be smaller, but you can't expect the numbers to line up with anything specific (especially since AMD is at least significantly changing the AVX section).

  • 7 months ago
  • 1 point

zen was 14nm zen+ was 12nm what?

  • 7 months ago
  • 1 point

Whatever GF called 12nm. In practice it was the same size (this was far cheaper for AMD), but may have used superior transistors.

  • 7 months ago
  • 1 point

Don't assume intel 10nm is better than tsmc. Is not.

Intel is struggling to make 10nm. The person that promoted intel in house chip fabrication and laughed at amd getting out of the chip fabrication is retiring. He saw the writing in the wall.

5nm is in the testing stage at tsmc. Intel will be stuck with 10nm for a long time. I have no doubt amd is working on 3nm chips. It doesn't matter how well the chip design is if you don't have factory to make it.

  • 7 months ago
  • 1 point

Each company measures "NM" differently so you cannot use the "NM" to compare sizes outside of that specific company.

  • 7 months ago
  • 1 point

The point is that any superiority of the TSMC process (besides being able to actually ship chips beyond a few low end duds) isn't based on the difference in number.

I wouldn't count Intel out (they've been leading semiconductor fabrication since they first got the patent on the chip itself), but this might take awhile to dig themselves out of their own hole. They may have to go straight to 7nm or EUV to get going again, and that won't happen fast. I'm pretty sure AMD will win this generation technically, but I have no idea if Intel can use similar dirty tricks as the last time they were able to hold back Athlon until core came out.

  • 7 months ago
  • 0 points

intel is so far behind now it will take at least a decade to catch up with amd. The main difference between intel and amd is chip fabrication. Amd sold off their fabrication and focus on desiging chips. Intel have their own chip fabrication factory.

Intel fabrication division can't keep up with the chip fabrication industry. As early as 2015 intel said 14nm was the limit to silicon. Well we now know it is not true because 5nm silicon is now in the testing stage. It intel surrender in the highly competitive chip fabrication industry. Intel is struggling to make 10nm while others are preparing 5nm.

Amd is now free to use whatever chip fabrication company that is good for them. That's why they could sell ryzen and their gpu for less price. Intel can't used third party chip fabrication without destroying their own chip fabrication department. Intel is really in a hard place. The company is being dragged down by their chip fabrication division.

[comment deleted]
  • 7 months ago
  • 1 point

8 core (or at least not increasing to 16 core) makes a lot of sense considering the "chiplet" strategy was to avoid large 7nm chips. I also don't know the cost of the EPYC I/O chip, but it looks like a great way to create a Threadripper3: just only add two or four chiplets instead of eight (of course the existence of all that I/O might make it impossible to sell a threadripper as less than an EPYC. Too bad, it was a cool product).

Granted, I think that WCCFTech works on good guesses and whatever drives clicks. They probably looked at the chiplets and decided not to guess more than 8 cores.

  • 7 months ago
  • 0 points

Granted, I think that WCCFTech works on good guesses and whatever drives clicks. They probably looked at the chiplets and decided not to guess more than 8 cores.

AMD confirmed during the EPYC launch there was 8-cores per chiplet.

Two Chiplets are joined together for each CCX.

And since they showed a delidded EPYC we know the size of the chiplets and the I/O block.

You do have just enough space inside the AM4 package for 1/4 the I/O block showed on EPYC and one CCX with space between for attaching to the data fabric.

That puts them for this generation as being hard limited to 16-cores per AM4 package.

They can do 16-cores but viability of things like space for solder overruns don't exist and the thermal expansion is going to be offset so it would likely need to be a paste TIM.

For Threadripper TR4 is a SP3 package so there are no limitations other then what AMD wants to do they can run either full packages like the second generations or partly disabled like first.

  • 7 months ago
  • 1 point

I'll be very surprised if amd could pull off a 4.5 ghz overclock. A 5.5ghz overclock imo is really reaching. I agree that they won't be released till like March/April.

  • 7 months ago
  • 1 point

I'd very disappointed if they cannot pull off at least a 4.5ghz overclock. Maybe I'm being too optimistic though.

  • 7 months ago
  • 1 point

Remember they are moving from a 7/8th generation revision of the Samsung 14nm process to a 1st gen 7nm early process from TSMC which is focused at lower power draw not achieving maximum clock speeds.

Like the other Ryzen generations reusing parts for the whole line these are using the same chiplets as the recently launched EPYC so we already know a little about them.

  • 7 months ago
  • 1 point

What are you yourself expecting? Are you optimistic? Do you think Zen 2 will be a success?

  • 7 months ago
  • 1 point

There are too many issues already known to be optimistic.

No direct access to memory controller which we have already seen on the WX Threadrippers hamstrings Zen architectures performance.

Adding more instruction pathways to increase IPC when they already have higher IPC then competing Core products but are currently unable to leverage that IPC isn't going to help.

They are using a second generation of the data fabric but the newer PCI-e standard requires double the bandwidth on that data fabric, as well as overall load will be higher across more of the data fabric with I/O, memory controller, and PCI-e no longer being directly attached to the module.

Latency of the data fabric increases over distance and nothing is connected anymore.

And to top it all off you have AMD's statement that they were able to see a 29% increase in a workload able to leverage the benefits of Zen's design but they used double the cores to see that gain.

Benchmarks are needed since there are way to many questions.

  • 7 months ago
  • 2 points

No direct access to memory controller which we have already seen on the WX Threadrippers hamstrings Zen architectures performance.

The biggest problems with WX TR's configuration, is that some cores have great access to memory, some have terrible access to memory. This creates conditions that rely heavily on scheduler optimization to put the right work in the right places. Then we have the Windows scheduler, which is not optimized for TR/EPYC at all right now. There are serious problems with scheduling optimization in Windows on this platform (regardless of whether it is on TR with 4 channel or EPYC with 8 channel). Meanwhile, when tested in Linux, these CPU's perform without the odd performance regressions in certain workloads.

In the new rome/ryzen 2 design, the memory controller is no longer going to be positioned to favor a particular group of cores, so the performance discrepancies related to the out-of-balance memory access should dissolve. Scheduler optimizations on a longer timeline will help alleviate issues that arise from the ever-expanding nodes in AMD's designs.

The remaining issue, is going to be optimizing software to LIMIT thread generation when it is already up against memory bandwidth limitations or traditional multi-core scaling problems. We're getting to a point in core/thread count here where lots of software that is capable of spawning a large number of threads, will actually degrade performance when attempting to use all of the threads compared to using fewer.

Then there's another issue that hasn't been considered.... L4 cache.

To this day, the i7-5775C still demonstrates the highest IPC of any CPU ever developed in many workloads. Moving the I/O and memory controller to a separate, centralized chip, may have created an opportunity for an L4 cache. Looking at the pictures of Rome... I'd be hard pressed to believe there isn't an L4 cache in that giant I/O chip.

  • 7 months ago
  • 1 point

Thanks for responding, that's very interesting. I didn't know many of those things.

Considering the limitations of the architecture and AMD's apparent confidence of the upcoming announcements at CES, what do you think is a best- and worse-case scenario consumers can expect, for instance, post-launch and toward the end of the year?

  • 7 months ago
  • 1 point

It isn't like Samsung designs for high power ([ex-]IBM may have had a hand in any high performance characteristics). In general, most familiar with both processes expect quite a benefit from 7nm. Their business is largely involving cell phone SOCs. Weirdly enough, I expect AMD to benefit from TSMC having Nvidia as a customer and needing higher performance than the typical cell phone (although Apple is probably driving the show and wanting higher efficiency).

  • 7 months ago
  • 1 point

They expect a gain going from TSMC 16nm to TSMC 7nm.

TSMC has an advantage in achieving higher clock speeds but it's at a cost of worse efficiency and larger footprint.

Samsung already had the advantage of higher efficiency and smaller space with their 14nm products versus TSMC 16nm at the cost of higher thermal density. Globalfoundries uses Samsung processes and have the same benefits and costs.

It's why NVidia uses Samsung for the smaller GTX/GT cards, and TSMC for larger products where power efficiency isn't as critical.

  • 7 months ago
  • 1 point

That's Navi (and Vega), not Zen ("They expect a gain going from TSMC 16nm to TSMC 7nm.")

I thought Apple got about 25% performance increase from TSMC 16nm to TSMC 7nm, but some of that could be their engineers getting up to speed on complex ARM chips. Also note that I expect that a 25% increase might be possible for Vega->Navi thanks to the reasonable clockrate (lots more margin at ~2GHz than >4GHz) that won't be possible for Zen2.

But we saw nearly a 10% improvement in clockspeed on Zen to Zen+ alone from 16nm to 14nm. I'd expect at least that much from a full node improvement. And 10% should be enough to break 4GHz normal/5GHz boost (note that Intel doesn't claim to run 8 cores faster than 3.8GHz, so breaking that 5GHz boost should kill that "buy Intel for gaming" meme).

Why in the world do you expect less increases from 14nm to 7nm than 16nm to 14nm?

  • 7 months ago
  • 1 point

Turbo reach 5.0ghz. It 7nm half the size of the current cpu.

  • 7 months ago
  • 1 point

5.5 GHz? LOL! Dream on...

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